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FEATURES

LTC3530 Wide Input Voltage Synchronous Buck-Boost DC/DC Converter DESCRIPTIO
The LTC(R)3530 is a wide VIN range, highly efficient, fixed frequency, buck-boost DC/DC converter that operates from input voltages above, below or equal to the output voltage. The topology incorporated in the IC provides a continuous transfer function through all operating modes, making the product ideal for single lithium-ion, two-cell alkaline or NiMH applications where the output voltage is within the battery voltage range. The LTC3530 is pin compatible with the LTC3440 buckboost DC/DC converter but adds programmable automatic Burst Mode operation and extends the VIN/VOUT range to 1.8V. Switching frequencies up to 2MHz are programmed with an external resistor. Automatic Burst Mode operation allows the user to program the load current threshold for Burst Mode operation using a single resistor from the BURST pin to GND. Other features include 1A shutdown, short circuit protection, programmable soft-start control, current limit and thermal shutdown. The LTC3530 is available in a thermally enhanced 10-lead (3mm x 3mm) DFN or MSOP package.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. *Patent Pending

Regulated Output with Input Voltages Above, Below or Equal to the Output 1.8V to 5.5V Input and 1.8V to 5.25V Output Range 250mA Continuous Output Current from 1.8V VIN 600mA Continuous/1A Peak Output Current from Li-Ion Single Inductor Synchronous Rectification: Up to 96% Efficiency Programmable Automatic Burst Mode(R) Operation Output Disconnect in Shutdown Pin Compatible with the LTC3440 Programmable Frequency from 300kHz to 2MHz <1A Shutdown Current Small Thermally Enhanced 10-Lead (3mm x 3mm) DFN and 10-Lead MS Packages
APPLICATIO S

MP3 Players Handheld Instruments Digital Cameras Smart Phones Portable GPS Units Miniature Hard Disk Drive Power
TYPICAL APPLICATIO
4.7H SW1
100 90 SW2 VOUT VOUT 3.3V AT 250mA 80 EFFICIENCY (%) 70 60 50 40 30 330pF 200k 20 10 0.01F 100k
3530 TA01a
1.8V TO 5.5V
VIN LTC3530 FB
340k
OFF ON
SHDN/SS VC 10F 33.2k RT BURST GND
30.1k
22F
U
U
U
Efficiency
Burst Mode OPERATION
VIN = 2V VIN = 4.2V VIN = 3.6V
0 0.1
10 100 1 OUTPUT CURENT (mA)
1000
3350 TA01b
3530f
1
LTC3530 ABSOLUTE AXI U RATI GS
VIN, VOUT Voltage ......................................... -0.3V to 6V SW1, SW2 Voltage DC............................................................ -0.3V to 6V Pulsed < 100ns ........................................ -0.3V to 7V
PACKAGE/ORDER I FOR ATIO
TOP VIEW RT BURST SW1 SW2 GND 1 2 3 4 5 11 10 VC 9 FB 8 SHDN/SS 7 VIN 6 VOUT
DD PACKAGE 10-LEAD (3mm x 3mm) PLASTIC DFN TJMAX = 125C, JA = 43C/W, JC = 4.3C/W EXPOSED PAD IS GND (PIN 11) MUST BE SOLDERED TO PCB
ORDER PART NUMBER LTC3530EDD
DD PART MARKING LCBH
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
PARAMETER Input Operating Range Output Voltage Adjust Range Feedback Voltage Feedback Input Current Quiescent Current, Burst Mode Operation Quiescent Current, Shutdown Quiescent Current, Active Input Current Limit VFB = 1.215V CONDITIONS
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = VOUT = 3.6V, RT = 33.2k, unless otherwise noted.
MIN

VFB = 1.215V, BURST = 0V (Note 3) SHDN = 0V, Not Including Switch Leakage VC = 0V, BURST = 3V (Note 3)
2
U
U
W
WW U
W
(Note 1)
VC, RT, FB, SHDN/SS, BURST Voltage .......... -0.3V to 6V Operating Temperature (Note 2) .............. -40C to 85C Maximum Junction Temperature (Note 4) ............ 125C Storage Temperature Range................... -65C to 150C
TOP VIEW RT BURST SW1 SW2 GND 1 2 3 4 5 10 9 8 7 6 VC FB SHDN/SS VIN VOUT
MS PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 125C, JA = 53C/W, JC = 4.3C/W
ORDER PART NUMBER LTC3530EMS
MS PART MARKING LTCBJ
TYP
MAX 5.5 5.25
UNITS V V V nA A A A A
1.8 1.8 1.191 1.215 1 40 0.1 700 1 2
1.239 50 60 1 1200
3530f
LTC3530 ELECTRICAL CHARACTERISTICS
PARAMETER NMOS Switch Leakage PMOS Switch Leakage NMOS Switch On Resistance PMOS Switch On Resistance Maximum Duty Cycle Minimum Duty Cycle Frequency Error Amp AVOL Error Amp Source Current Error Amp Sink Current Burst Threshold Burst Input Current SHDN/SS Threshold SHDN/SS Input Current VBURST = 5.5V When IC is Enabled When EA is at Maximum Boost Duty Cycle VSHDN = 5.5V
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = VOUT = 3.6V, RT = 33.2k, unless otherwise noted.
CONDITIONS Switches B and C Switches A and D Switches B and C Switches A and D Boost (% Switch C On) Buck (% Switch A On)

MIN
TYP 0.1 0.1 0.21 0.24
MAX 5 10
UNITS A A % %
80 100 0.7
90 0 1 90 300 300 1 2 1.3
% MHz dB A A V A V V A
0.4
0.85 1.6 0.01
1.4 1
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3530E is guaranteed to meet performance specifications from 0C to 85C. Specifications over the -40C to 85C operating temperature range are assured by design, characterization and correlations with statistical process controls.
Note 3: Current measurements are performed when the outputs are not switching. Note 4: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure.
TYPICAL PERFOR A CE CHARACTERISTICS
Quiescent Current vs VIN (Fixed Frequency Mode)
4.0 VIN QUIESCENT CURRENT (mA) 3.5 3.0 1.5 MHz 2.5 2.0 1.5 1.0 0.5 0.0 2.5 3.0 3.5 4.0 VIN (V) 4.5 5.0 5.5
3530 G01
VIN QUIESCENT CURRENT (A)
2.0 MHz
35 30 25 20 15 10 5 0 2.5 3.0 3.5 4.0 VIN (V) 4.5 5.0 5.5
3530 G02
INPUT CURRENT (A)
1.0 MHz 0.5 MHz NO SWITCHING
UW
TA = 25C, unless otherwise specified. Peak Current Clamp vs VIN
3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 2.5
Burst Mode Quiescent Current
50 45 40
3.0
3.5
4.0 VIN (V)
4.5
5.0
5.5
3530 G03
3530f
3
LTC3530 TYPICAL PERFOR A CE CHARACTERISTICS
Automatic Burst Mode Threshold vs RBURST
90 80 MINIMUM START VOLTAGE (V) 70 LOAD CURRENT (mA) 60 50 40 30 20 10 0 125 175 225 275 325 375 425 475 500 RBURST (k)
3530 G04
CHANGE FROM 25C
LEAVE Burst Mode OPERATION
ENTER Burst Mode OPERATION
Frequency Change vs Temperature
1.25 1.23 1.21 FEEDBACK VOLTAGE (V) FREQUENCY (MHz) 1.19 1.17 1.15 1.13 1.11 1.09 1.07 1.05 -45 -25 -5 15 35 55 75 TEMPERATURE (C) 95 115
3530 G07
Switch Pins in Buck-Boost Mode
SW1 2V/DIV SW2 2V/DIV SW1 2V/DIV
50ns/DIV VIN = 3.3V VOUT = 3.3V AT 500mA
4
UW
TA = 25C, unless otherwise specified. Average Input Current Limit vs Temperature
5% 4% 3% VIN = VOUT = 3.3V
Minimum Start Voltage vs Temperature
1.84 1.82 1.80 1.78 1.76 1.74 1.72 1.70 -45 -25 -5
2% 1% 0% -1% -2% -3% -4%
75 TEMPERATURE (C)
15
35
55
95 115
3530 G05
-5% -55 -35 -15
5 25 45 65 85 105 125 TEMPERATURE (C)
3530 G06
Feedback Voltage vs Temperature
1.225
Switch Pins Before Entering Boost Mode
1.220 SW1 2V/DIV 1.215
1.210
SW2 2V/DIV
1.205
1.200 -45 -25 -5
15 35 55 75 TEMPERATURE (C)
95 115
3530 G08
50ns/DIV VIN = 2.9V VOUT = 3.3V AT 500mA
3530 G09
Switch Pins Entering Buck-Boost Mode
LTC3530 Output Ripple 500mA Load
VIN = 2.7V
SW2 2V/DIV
VIN = 3.3V VIN = 4.2V
3530 G10
50ns/DIV VIN = 4.2V VOUT = 3.3V AT 500mA
3530 G11
1s/DIV VOUT = 3.3V 20mV/DIV AC COUPLED COUT = 22F, X5R CERAMIC
3530 G12
3530f
LTC3530 TYPICAL PERFOR A CE CHARACTERISTICS
Load Transient Response in Fixed Frequency Mode, No Load to 300mA
VOUT 100mV/DIV VOUT 100mV/DIV
LOAD 0.25A/DIV 100s/DIV VIN = 3.6V VOUT = 3.3V COUT = 22F, X5R CERAMIC
3530 G13
Transition from Burst Mode Operation to Fixed Frequency Mode
VOUT 200mV/DIV 2000 1800 1600 BURST 2V/DIV INDUCTOR CURRENT 0.5A/DIV 200s/DIV COUT = 22F, X5R CERAMIC
3530 G16
CURRENT (mA)
PI FU CTIO S
RT (Pin 1): Programs the Frequency of the Internal Oscillator. Connect a resister from RT to ground. f(kHz) = 33,170/RT (k) BURST (Pin 2): Used to Set the Automatic Burst Mode Threshold. Connect a resistor and capacitor in parallel from this pin to ground. See the Applications Information section for component value selection. For manual control, ground the pin to force Burst Mode operation, connect to VIN to force fixed frequency PWM mode. SW1 (Pin 3): Switch Pin Where the Internal Switches A and B are Connected. Connect inductor from SW1 to SW2. An optional Schottky diode can be connnected from SW1 to ground for a moderate efficiency improvement. Minimize trace length to keep EMI down. SW2 (Pin 4): Switch Pin Where the Internal Switches C and D are Connected. For applications with output voltages over 4.3V, a Schottky diode is required from SW2 to VOUT to ensure the SW pin does not exhibit excessive voltage.
UW
TA = 25C, unless otherwise specified.
Load Transient Response in Auto Burst Mode Operation, No Load to 500mA
Typical Burst Mode Waveforms
VOUT 50mV/DIV
LOAD 0.25A/DIV 100s/DIV VIN = 3.6V VOUT = 3.3V COUT = 47F, X5R CERAMIC + 100F LOW ESR TANTALUM
3530 G14
INDUCTOR CURRENT 0.25A/DIV 22s/DIV COUT = 22F, X5R CERAMIC
3530 G15
Maximum Output Current vs VIN
1400 1200 1000 800 600 400 250mA AT 1.8V 200 1.5 2.5 3.5 VIN (V) 4.5 5.5
3530 G17
IOUT
U
U
U
3530f
5
LTC3530 PI FU CTIO S
GND (Pin 5): Ground for the IC. VOUT (Pin 6): Output of the Synchronous Rectifier. A filter capacitor is placed from VOUT to GND. A ceramic bypass capacitor is recommended as close to the VOUT and GND pins as possible. VIN (Pin 7): Input Supply Voltage. Internal VCC for the IC. A 10F ceramic capacitor is recommended as close to the VIN and GND pins as possible. SHDN/SS (Pin 8): Combined Soft-Start and Shutdown. Applied voltage <0.4V shuts down the IC. Tie to >1.4V to enable the IC and >1.6V to ensure the error amp is not clamped from soft-start. An R-C from the shutdown command signal to this pin will provide a soft-start function by limiting the rise time of VC. FB (Pin 9): Feedback Pin. Connect resistor divider tap here. The output voltage can be adjusted from 1.8V to 5.25V. The feedback reference is typically 1.215V. R1 VOUT = 1 . 215V * 1 + R2 VC (Pin10): Error Amp Output. An R-C network is connected from this pin to FB for loop compensation. Refer to "Closing the Feedback Loop" section for component selection guidelines. During Burst Mode operation, VC is internally clamped. Exposed Pad (Pin 11, DD Package Only): Ground. This pin must be soldered to the PCB and electrically connected to ground.
BLOCK DIAGRA
VIN
7 CIN
REVERSE AMP RSS R1
SHDN/SS 8 CSS
PWM LOGIC
PWM COMPARATORS
SLEEP RT 1 RT VREF OSC
GND 5
6
-
SHUTDOWN SOFT-START
SHUTDOWN
+
-
+
-
+
W
U
U
U
L1 SW1 3 ANTI-RING SW D VOUT 6 GATE DRIVERS AND ANTICROSS CONDUCTION COUT SW C 4 SW2
SW A
SW B
+
Gm = 1/60k 2A
- +
ERROR AMP 1.215V FB 9 VC 10 CP1 R2
-
AUTOMATIC BURST MODE CONTROL BURST 2 1.215V VREF THERMAL SHUTDOWN
3530 BD
RBURST
CBURST
3530f
LTC3530 OPERATIO
The LTC3530 provides high efficiency, low noise power for a wide variety of handheld electronic devices. The LTC proprietary topology allows input voltages above, below or equal to the output voltage by properly phasing the output switches. The error amp output voltage on VC determines the output duty cycle of the switches. Since VC is a filtered signal, it provides rejection of frequencies from well below the switching frequency. The low RDS(ON), low gate charge synchronous switches provide high frequency pulse width modulation control at high efficiency. High efficiency is achieved at light loads when Burst Mode operation is entered and the LTC3530's quiescent current drops to a low 40A. LOW NOISE FIXED FREQUENCY OPERATION Oscillator The frequency of operation is programmed by an external resistor from RT to ground, according to the following equation: f (kHz ) 33,170 = RT(k)
Error Amp The error amplifier is a voltage mode amplifier. The loop compensation components are configured around the amplifier (from FB to VC) to obtain stability of the converter. For improved bandwidth, an additional R-C feed-forward network can be placed across the upper feedback divider resistor. The voltage on SHDN/SS clamps the error amp output, VC, to provide a soft-start function.
VIN 7 PMOS A SW1 3 NMOS B SW2 4
Figure 1. Simplified Diagram of Output Switches
U
Internal Current Limit There are two different current limit circuits in the LTC3530. Each has internally fixed thresholds which vary inversely with VIN. The first circuit is a high speed peak current limit comparator that will shut off switch A once the current exceeds 2.5A typical. The delay to output of this comparator is typically 50ns. A second amplifier will source current out of FB to drop the output voltage once the peak input current exceeds 2A typical. This method provides a closed loop means of clamping the input current. During conditions where VOUT is near ground, such as during a short-circuit or during startup, this threshold is cut to 670mA (typ), providing a foldback feature. For this current limit feature to be most effective, the Thevenin resistance from FB to ground should be greater than 100k. Reverse Current Limit During fixed frequency operation, the LTC3530 operates in forced continuous conduction mode. The reverse current limit amplifier monitors the inductor current from the output through switch D. Once the negative inductor current exceeds 640mA typical, the LTC3530 will shut off switch D. Four-Switch Control Figure 1 shows a simplified diagram of how the four internal switches are connected to the inductor, VIN, VOUT and GND. Figure 2 shows the regions of operation for the LTC3530 as a function of the internal control voltage, VCI.
85% DMAX BOOST VOUT 6 PMOS D A ON, B OFF BOOST REGION PWM CD SWITCHES DMIN BOOST DMAX BUCK FOUR SWITCH PWM BUCK/BOOST REGION V2 (1V) D ON, C OFF PWM AB SWITCHES BUCK REGION 0% NMOS C DUTY CYCLE V1 (0.7V) INTERNAL CONTROL VOLTAGE, VCI V3 (1.15V) V4 (1.5V)
3530 F02 3530 F01
Figure 2. Switch Control vs Internal Control Voltage, VCI
3530f
7
LTC3530 OPERATIO
Depending on the control voltage, the IC will operate in either buck, buck/boost or boost mode. The VCI voltage is a level shifted voltage from the output of the error amp (VC). The four power switches are properly phased so the transfer between operating modes is continuous, smooth and transparent to the user. When VIN approaches VOUT the buck/boost region is reached where the conduction time of the four switch region is typically 150ns. Referring to Figures 1 and 2, the various regions of operation will now be described. Buck Region (VIN > VOUT) Switch D is always on and switch C is always off during this mode. When the internal control voltage, VCI, is above voltage V1, output A begins to switch. During the off-time of switch A, synchronous switch B turns on for the remainder of the time. Switches A and B will alternate similar to a typical synchronous buck regulator. As the control voltage increases, the duty cycle of switch A increases until the maximum duty cycle of the converter in buck mode reaches DMAX_BUCK, given by: DMAX_BUCK = 100 - D4SW % where D4SW = duty cycle % of the four switch range. D4SW = (150ns * f) * 100 % where f = operating frequency, Hz. Beyond this point the "four switch," or buck/boost region is reached. Buck/Boost or Four Switch (VIN VOUT) When the internal control voltage, VCI, is above voltage V2, switch pair AD remain on for duty cycle DMAX_BUCK, and the switch pair AC begins to phase in. As switch pair AC phases in, switch pair BD phases out accordingly. When the VCI voltage reaches the edge of the buck/boost range, at voltage V3, the AC switch pair completely phase out the BD pair, and the boost phase begins at duty cycle D4SW. The input voltage, VIN, where the four switch region begins is given by: VOUT VIN = 1 - (150ns * f)
8
U
The point at which the four switch region ends is given by: VIN = VOUT(1 - D) = VOUT(1 - 150ns * f) V Boost Region (VIN < VOUT) Switch A is always on and switch B is always off during this mode. When the internal control voltage, VCI, is above voltage V3, switch pair CD will alternately switch to provide a boosted output voltage. This operation is typical of a synchronous boost regulator. The maximum duty cycle of the converter is limited to 90% typical and is reached when VCI is above V4. BURST MODE OPERATION Burst mode reduces the LTC3530's quiescent current consumption at light loads and improves overall conversion efficiency, increasing battery life. During Burst Mode operation the LTC3530 delivers energy to the output until it is regulated and then goes into sleep mode where the outputs are off and quiescent current drops to 40A (typ). In this mode the output ripple has a variable frequency component that depends upon load current, and will typically be about 2% peak-to-peak. Burst Mode operation ripple can be reduced slightly by using more output capacitance (47F or greater). Another method of reducing Burst Mode operation ripple is to place a small feed-forward capacitor across the upper resistor in the VOUT feedback divider network (as in Type III compensation). During the period where the device is delivering energy to the output, the peak switch current will be equal to 450mA typical and the inductor current will terminate at zero current for each cycle. In this mode the typical maximum average output current is given by: IMAX(BURST )BUCK 450mA ; VOUT < VIN 2 450mA 2 V * IN ; VOUT > VIN VOUT IMAX(BURST )BOOST IMAX(BURST) Buck-Boost 350mA; VOUT VIN. Since the input and output are connected together for most of the cycle.
3530f
LTC3530 OPERATIO
The efficiency below 1mA becomes dominated primarily by the quiescent current. The Burst Mode operation efficiency is given by: EFFICIENCY * ILOAD 40 A + ILOAD
where is typically 90% during Burst Mode operation. Automatic Burst Mode Operation Control Burst Mode operation can be automatic or manually controlled with a single pin. In automatic mode, the IC will enter Burst Mode operation at light load and return to fixed frequency operation at heavier loads. The load current at which the mode transition occurs is programmed using a single external resistor from BURST to ground, according to the following equations: Enter Burst Mode: IBURST = Leave Bu rst Mode: IBURST = 8.8 RBURST 11.2 RBURST
where RBURST is in k and IBURST is the load transition current in Amps. Do not use values of RBURST greater than 500k. For automatic operation, a filter capacitor must also be connected from BURST to ground. The equation for the minimum capacitor value is: CBURST(MIN) COUT * VOUT 60, 000
where CBURST(MIN) and COUT are in F In the event that a load transient causes FB to drop by more than 4% from the regulation value while in Burst Mode operation, the IC will immediately switch to fixed frequency mode and an internal pull-up will be momentarily applied to BURST, rapidly charging CBURST. This prevents the IC from immediately re-entering Burst Mode operation once the output achieves regulation.
U
Manual Burst Mode Operation For manual control of Burst Mode operation, the RC network connected to BURST can be eliminated. To force fixed frequency mode, BURST should be connected to VIN. To force Burst Mode operation, BURST should be grounded. When commanding Burst Mode operation manually, the circuit connected to BURST should be able to sink up to 2mA. For optimum transient response with large dynamic loads, the operating mode should be controlled manually by the host. By commanding fixed frequency operation prior to a sudden increase in load, output voltage droop can be minimized. Note that if the load current applied during forced Burst Mode operation (BURST pin is grounded) exceeds the current that can be supplied, the output voltage will start to droop and the IC will automatically come out of Burst Mode operation and enter fixed frequency mode, raising VOUT. Once regulation is achieved, the IC will then enter Burst Mode operation once again, and the cycle will repeat, resulting in about 4% output ripple. Burst Mode Operation to Fixed Frequency Transient Response In Burst Mode operation, the compensation network is not used and VC is disconnected from the error amplifier. During long periods of Burst Mode operation, leakage currents in the external components or on the PC board could cause the compensation capacitor to charge (or discharge), which could result in a large output transient when returning to fixed frequency mode of operation, even at the same load current. To prevent this, the LTC3530 incorporates an active clamp circuit that holds the voltage on VC at an optimal voltage during Burst Mode operation. This minimizes any output transient when returning to fixed frequency mode operation. For optimum transient response, Type 3 compensation is also recommended to broad band the control loop and roll off past the two pole response of the output LC filter. See Closing the Feedback Loop under Applications Information.
3530f
9
LTC3530 OPERATIO U
VIN
where f = operating frequency, Hz
VCI VC
SHDN/SS
IL = maximum allowable inductor ripple current, A VIN(MIN) = minimum input voltage, V VIN(MAX) = maximum input voltage, V VOUT = output voltage, V
3530 F05
Figure 3.
IOUT(MAX) = maximum output load current For high efficiency, choose a ferrite inductor with a high frequency core material to reduce core loses. The inductor should have low ESR (equivalent series resistance) to reduce the I2R losses, and must be able to handle the peak inductor current without saturating. Molded chokes or chip inductors usually do not have enough core to support the peak inductor currents in the 1A to 2A region. To minimize radiated noise, use a shielded inductor. See Table 1 for a suggested list of inductor suppliers. Output Capacitor Selection
Soft-Start The soft-start function is combined with shutdown. When the SHDN/SS pin is brought above 1V typical, the IC is enabled but the EA duty cycle is clamped from VC. A detailed diagram of this function is shown in Figure 3. The components RSS and CSS provide a slow ramping voltage on SHDN/SS to provide a soft-start function. To ensure that VC is not being clamped, SHDN/SS must be raised above 1.6V. COMPONENT SELECTION Inductor Selection The high frequency operation of the LTC3530 allows the use of small surface mount inductors. The inductor ripple current is typically set to 20% to 40% of the maximum inductor current. For a given ripple the inductance terms are given as follows: LBOOST > LBUCK > VIN(MIN) * ( VOUT - VIN(MIN) ) f * IL * VOUT f * IL * VIN(MAX )
PHONE (847) 639-6400 (800) 227-7040 (814) 237-1431 (800) 831-9172 USA: (847) 956-0666 Japan: 81(3) 3607-5111 (847) 803-6100 (847) 297-0070
The bulk value of the output filter capacitor is set to reduce the ripple due to charge into the capacitor each cycle. The steady state ripple due to charge is given by: % Ripple_Boost = IOUT(MAX ) * (VOUT - VIN(MIN) ) * 100 COUT * VOUT 2 * f % Ripple_Buck = H 1 ( VIN(MAX ) - VOUT ) * 100 % VIN(MAX ) 8LCf2 where COUT = output filter capacitor in Farads and f = switching frequency in Hz.
FAX (847) 639-1469 (650) 361-2508 (814) 238-0409 USA: (847) 956-0702 Japan: 81(3) 3607-5144 (847) 803-6296 (847) 699-7864 WEB SITE www.coilcraft.com www.circuitprotection.com/magnetics.asp www.murata.com www.sumida.com www.component.tdk.com www.tokoam.com
3530f
%
VOUT * ( VIN(MAX ) - VOUT )
H
Table 1. Inductor Vendor Information
SUPPLIER Coilcraft CoEv Magnetics Murata Sumida TDK TOKO
10
LTC3530 APPLICATIONS INFORMATION
The output capacitance is usually many times larger than the minimum value in order to handle the transient response requirements of the converter. For a rule of thumb, the ratio of the operating frequency to the unity-gain bandwidth of the converter is the amount the output capacitance will have to increase from the above calculations in order to maintain the desired transient response. The other component of ripple is due to the ESR (equivalent series resistance) of the output capacitor. Low ESR capacitors should be used to minimize output voltage ripple. For surface mount applications, Taiyo Yuden or TDK ceramic capacitors, AVX TPS series tantalum capacitors or Sanyo POSCAP are recommended. See Table 2 for contact information. Input Capacitor Selection Since VIN is the supply voltage for the IC, as well as the input to the power stage of the converter, it is recommended to place at least a 10F, low ESR ceramic bypass capacitor close to the VIN and GND pins. It is also important to minimize any stray resistance from the converter to the battery or other power source. Optional Schottky Diodes Schottky diodes across the synchronous switches B and D are not required (VOUT < 4.3V), but provide a lower drop during the break-before-make time (typically 15ns) improving efficiency. Use a surface mount Schottky diode such as an MBRM120T3 or equivalent. Do not use ordinary rectifier diodes, since the slow recovery times will compromise efficiency. For applications with an output voltage above 4.3V, a Schottky diode is required from SW2 to VOUT. Output Voltage < 1.8V The LTC3530 can operate as a buck converter with output voltages as low as 0.4V. Synchronous switch D is powered from VOUT and the RDS(ON) will increase at low output voltages, therefore a Schottky diode is required from SW2 to VOUT to provide the conduction path to the output. Note that Burst Mode operation is inhibited at output voltages below 1V typical. Note also that if VOUT is less than 1V, the current limit will be 670mA (typ). Output Voltage > 4.3V A Schottky diode from SW2 to VOUT is required for output voltages over 4.3V. The diode must be located as close to the pins as possible in order to reduce the peak voltage on SW2 due to the parasitic lead and trace inductance. Input Voltage > 4.5V For applications with input voltages above 4.5V which could exhibit an overload or short-circuit condition, a 2/1nF series snubber is required between SW1 and GND. A Schottky diode from SW1 to VIN should also be added as close to the pins as possible. For the higher input voltages, VIN bypassing becomes more critical; therefore, a ceramic bypass capacitor as close to the VIN and GND pins as possible is also required. Operating Frequency Selection Higher operating frequencies allow the use of a smaller inductor and smaller input and output filter capacitors, thus reducing board area and component height. However, higher operating frequencies also increase the IC's total quiescent current due to the gate charge of the four switches, as given by: Buck: Boost:
Table 2. Capacitor Vendor Information
SUPPLIER AVX Murata Sanyo Taiyo Yuden TDK PHONE (803) 448-9411 (814) 237-1431, (800) 831-9172 (619) 661-6322 (408) 573-4150 (847) 803-6100 FAX (803) 448-1943 (814) 238-0409 (619) 661-1055 (408) 573-4159 (847) 803-6296 WEB SITE www.avxcorp.com www.murata.com www.sanyovideo.com www.t-yuden.com www.component.tdk.com
3530f
Iq = (0.6 * VIN * f) mA Iq = [0.8 * (VIN + VOUT) * f] mA
Buck/Boost: Iq = [f * (1.4 * VIN + 0.4 * VOUT)] mA
11
LTC3530 APPLICATIONS INFORMATION
where f = switching frequency in MHz. Therefore frequency selection is a compromise between the optimal efficiency and the smallest solution size. Closing the Feedback Loop The LTC3530 incorporates voltage mode PWM control. The control to output gain varies with operation region (buck, boost, buck/boost), but is usually no greater than 15. The output filter exhibits a double pole response, as given by: f FILTER--POLE = (in buck mode) f FILTER--POLE = (in boost mode) where L is in henries and COUT is in farads. The output filter zero is given by: f FILTER-- ZERO = 1 2 * * RESR * COUT Hz fPOLE1 VIN 2 * VOUT * * L * COUT Hz 1 2 * * L * COUT Hz The loop gain is typically rolled off before the RHP zero frequency. A simple Type I compensation network can be incorporated to stabilize the loop, but at a cost of reduced bandwidth and slower transient response. To ensure proper phase margin using Type I compensation, the loop must be crossed over a decade before the LC double pole. The unity-gain frequency of the error amplifier with the Type I compensation is given by: fUG = 1 Hz (referring to Figure 4). 2 * * R1 * CP1
Most applications demand an improved transient response to allow a smaller output filter capacitor. To achieve a higher bandwidth, Type III compensation is required, providing two zeros to compensate for the double-pole response of the output filter. Referring to Figure 5, the location of the poles and zeros are given by: 1 Hz 2 * * 32e3 * R1* CP1
(which is extremely cl ose to DC) fZERO1 = fZERO2 = fPOLE2 = 1 Hz 2 * * RZ * CP1 1 Hz 2 * * R1* CZ1 1 Hz 2 * * RZ * CP2
where RESR is the equivalent series resistance of the output capacitor. A troublesome feature in boost mode is the right-half plane zero (RHP), given by: f RHPZ = VIN2 Hz 2 * * IOUT * L * VOUT
where resistance is in ohms and capacitance is in farads.
VOUT
+
VOUT
1.215V FB 12 VC 11 RZ CP2
3530 F04
+
ERROR AMP
1.215V FB 12 VC 11 CP1 R2
3530 F03
ERROR AMP
R1
CZ1
R1
-
-
CP1
R2
Figure 4. Error Amplifier with Type I Compensation
Figure 5. Error Amplifier with Type III Compensation
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12
LTC3530 TYPICAL APPLICATIONS
1MHz Li-Ion to 3.3V at 500mA Converter with Manual Mode Control
L1 3.3H
2.7V TO 4.2V RSS 1M
SW1 VIN
SW2 LTC3530 VOUT FB R1 340k RZ 15k CP1 470pF RFF 4.7k CZ1 100pF
VOUT 3.3V 500mA
CIN 10F
SHDN/SS RT
VC BURST
COUT 22F
Li-Ion
CSS RT 0.01F 33.2k
GND
R2 200k
BURST FIXED FREQ
CIN: TAIYO YUDEN JMK212BJ106MG COUT: TAIYO YUDEN JMK325BJ226MM L1: TDK RLF7030T-3R3M4R
3530 TA02
1MHz Li-Ion to 3.3V/600mA Converter with USB Power Input Option, Li Battery Charger and Power Path Management.
L1 4.7H
5V (NOM) FROM USB CABLE VBUS
SW1 IN1 1 10F IN2 VNTC NTC WALL SHDN SUSP HPWR TIMER PROG 0.1F CLPROG 97.6k GND LTC4055 CHRG ACPR CSS 0.01F RT 33.2k OUT BAT VIN RSS 1M
SW2 LTC3530 VOUT FB R1 340k RZ 15k CP1 470pF CBURST 0.01F RFF 4.7k CZ1 100pF
+
10F Li-Ion CELL
VOUT 3.3V 500mA
SHDN/SS RT
VC BURST
GND RBURST 200k
R2 200k
COUT 22F
SUSPEND USB POWER 500mA/100mA SELECT
CIN: TAIYO YUDEN JMK212BJ106MG COUT: TAIYO YUDEN JMK325BJ226MM L1: TDK RLF7030T-4R7M3R4
3530 TA03
97.6k
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13
LTC3530 TYPICAL APPLICATIONS
High Efficiency Li-Ion Powered Constant Current Lumiled Driver
L1 3.3H
VIN 2.2V TO 4.2V OFF ON CIN 10F
SW1 VIN
SW2 VOUT LTC3530 D1 FB CP1 1nF LHXL-PW01 R2 100k R4 100k CBURST 470pF COUT 4.7F ILED = 500mA
SD/SS
VC
RT GND RT 44.2k
BURST
3530 TA04a
R3 95.3k
R1 301k
R2 = R1/1.5 12,810 (R1+R2+R3+R4) ILED = R1, R3 D1 = BAT54
CIN = TAIYO YUDEN JMK212BJ106MG COUT = TAIYO YUDEN JMK325BJ475MM
Lumiled Driver Efficiency vs LED Current
100 98 96 94 EFFICIENCY (%) 92 90 88 86 84 82 80 0.1 LED CURRENT (A)
3530 TA04b
VIN = 3.6V 1MHz
0.5
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14
LTC3530 PACKAGE DESCRIPTION
DD Package 10-Lead Plastic DFN (3mm x 3mm)
(Reference LTC DWG # 05-08-1695)
R = 0.115 TYP 6 0.675 0.05 0.38 0.10 10
3.50 0.05 2.15 0.05
1.65 0.05 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6)
3.00 0.10 (4 SIDES)
1.65 0.10 (2 SIDES)
(DD10) DFN 1103
5 0.25 0.05 0.50 BSC 2.38 0.05 (2 SIDES) PACKAGE OUTLINE 0.200 REF 0.75 0.05 2.38 0.10 (2 SIDES)
1
0.25 0.05 0.50 BSC
0.00 - 0.05
BOTTOM VIEW--EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 5. EXPOSED PAD SHALL BE SOLDER PLATED 2. DRAWING NOT TO SCALE 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE 3. ALL DIMENSIONS ARE IN MILLIMETERS TOP AND BOTTOM OF PACKAGE
MS Package 10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
0.889 0.127 (.035 .005)
3.00 0.102 (.118 .004) (NOTE 3) 10 9 8 7 6 0.497 0.076 (.0196 .003) REF
5.23 (.206) MIN
3.20 - 3.45 (.126 - .136)
0.254 (.010) GAUGE PLANE
DETAIL "A" 0 - 6 TYP
4.90 0.152 (.193 .006)
3.00 0.102 (.118 .004) (NOTE 4)
0.50 0.305 0.038 (.0197) (.0120 .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT
0.53 0.152 (.021 .006) DETAIL "A" 0.18 (.007)
12345 1.10 (.043) MAX 0.86 (.034) REF
NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
SEATING PLANE
0.17 - 0.27 (.007 - .011) TYP
0.50 (.0197) BSC
0.127 0.076 (.005 .003)
MSOP (MS) 0603
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC3530 TYPICAL APPLICATION
USB to 5V Converter with Output Disconnect
2 1nF L1 10H 4 SW1 SW2 LTC3530 6 7 VIN VOUT 3 D2** USB 4.35V TO 5.25V 8 2 C1 10F SD C3 * 0.1F 1 SHDN/SS BURST RT FB VC GND 9 10 5 C4 1.5nF 15k C2** 22F R2 200k D1** VOUT 5VIN - 435mA MAX 4.35VIN - 350mA MAX R1 619k
R4 1M
RT = 1MHz f 33.2k OSC
*0 = Burst Mode OPERATION 1 = FIXED FREQUENCY ** LOCATE COMPONENTS AS CLOSE TO IC AS POSSIBLE
C1: TAIYO YUDEN JMK212BJ106MG C2: TAIYO YUDEN JMK325BJ226MM D1, D2: ON SEMICONDUCTOR MBRM120T3 L1: SUMIDA CDRH4D28-100
3530 TA05
RELATED PARTS
PART NUMBER LT3400/LT3400B LT3401/LT3402 LT3406/LT3406B LT3407 LT3411 LT3412 LT3421 LT3425 LT3429 LT3440 LT3441 LT3442/LTC3443 LT3444 LT3532 DESCRIPTION 600mA (ISW), 1.2MHz Synchronous Step-Up DC/DC Converter 1A/2A (ISW), 3MHz Synchronous Step-Up DC/DC Converter 600mA (IOUT), 1.5MHz Synchronous Step-Up DC/DC Converter 600mA (IOUT), 1.5MHz Dual Synchronous Step-Up DC/DC Converter 1.25A (IOUT), 4MHz Synchronous Step-Up DC/DC Converter 2.5A (IOUT), 4MHz Synchronous Step-Up DC/DC Converter 3A (ISW), 3MHz Synchronous Step-Up DC/DC Converter 5A (ISW), 8MHz Multiphase Synchronous Step-Up DC/DC Converter 600mA (ISW), 500kHz Synchronous Step-Up DC/DC Converter 600mA (IOUT), 2MHz Synchronous Buck-Boost DC/DC Converter 600mA (IOUT), 2MHz Synchronous Buck-Boost DC/DC Converter 1.2A (IOUT), Synchronous Buck-Boost DC/DC Converters, LTC3442 (1MHz), LTC3443 (600kHz) COMMENTS VIN: 0.85V to 5V, VOUT(MAX) = 5V, IQ = 19A/300A, ISD < 1A, ThinSOT Package VIN: 0.5V to 5V, VOUT(MAX) = 5V, IQ = 38mA, ISD < 1A, MS Package VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20A, ISD 1A, ThinSOT Package VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40A, ISD 1A, MS Package VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60A, ISD 1A, MS Package VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60A, ISD 1A, TSSOP16E Package VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12A, ISD < 1A, QFN Package VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12A, ISD < 1A, QFN Package VIN: 0.5V to 4.4V, VOUT(MAX) = 5V, IQ = 20A, ISD < 1A, QFN Package VIN: 2.5V to 5.5V, VOUT(MAX) = 5.5V, IQ = 25A, ISD < 1A, MS, DFN Package VIN: 2.5V to 5.5V, VOUT(MAX) = 5.5V, IQ = 25A, ISD < 1A, DFN Package VIN: 2.4V to 5.5V, VOUT(MAX) = 5.25V, IQ = 28A, ISD < 1A, MS Package
500mA (IOUT), 1.5MHz Synchronous Buck-Boost DC/DC Converter with VIN: 2.7V to 5.5V, VOUT = 0.5V to 5.25V, 3mm x 3mm Wide VOUT Range DFN Package, Ideal for WCDMA PA Bias 500mA (IOUT), 2MHz Synchronous Buck-Boost DC/DC Converter VIN: 2.4V to 5.5V, VOUT(MAX) = 5.25V, IQ = ISD < 1A, DFN Package
ThinSOT is a trademark of Linear Technology Corporation.
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16 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
LT 1006 * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2006

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